1. Field of the Invention
Example embodiments relate to a multi-chip package and a method of manufacturing the same. More particularly, example embodiments relate to a multi-chip package including a plurality of semiconductor packages sequentially stacked, and a method of manufacturing the multi-chip package.
2. Description of the Related Art
Generally, a plurality of semiconductor fabrication processes may be performed on a semiconductor substrate to form a plurality of semiconductor chips. In order to mount the semiconductor chips on a printed circuit board (PCB), a packaging process may be performed on the semiconductor chips to form semiconductor packages.
In order to increase a storage capacity of the semiconductor package, a multi-chip package including a plurality of the semiconductor chips sequentially stacked on a package substrate may have been widely developed. Further, when the semiconductor chip may have a size smaller than that of the package substrate, an interposer chip may be used for reducing an electrical connection length between the semiconductor chip and the package substrate.
When an active region of a lower semiconductor chip may be arranged on an upper surface of the lower semiconductor chip, the active region may make contact with an upper semiconductor chip. High heat generated from the active region of the lower semiconductor chip may not be readily transferred to the interposer chip.
Further, a power pad of the upper semiconductor chip may be connected with the interposer chip through a small conductive bump. Thus, a sufficient power may not be supplied to the upper semiconductor chip through the small conductive bump.